System-on-Chip Security
Validation and Verification
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E-Book information
Springer International Publishing
2019
EPub, PDF
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978-3-030-30596-3
3-030-30596-1
Annotation
This book describes a wide variety of System-on-Chip (SoC) security threats and vulnerabilities, as well as their sources, in each stage of a design life cycle. The authors discuss a wide variety of state-of-the-art security verification and validation approaches such as formal methods and side-channel analysis, as well as simulation-based security and trust validation approaches. This book provides a comprehensive reference for system on chip designers and verification and validation engineers interested in verifying security and trust of heterogeneous SoCs.
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