Cover of David R. Martinez (EDT), Robert A. Bond (EDT), M. Michael Vai (EDT): High Performance Embedded Computing Handbook

David R. Martinez (EDT), Robert A. Bond (EDT), M. Michael Vai (EDT) High Performance Embedded Computing Handbook

A Systems Perspective

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CRC Press

2018

EPub
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978-1-351-83779-8

1-351-83779-6

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Over the past several decades, applications permeated by advances in digital signal processing have undergone unprecedented growth in capabilities. The editors and authors of High Performance Embedded Computing Handbook: A Systems Perspective have been significant contributors to this field, and the principles and techniques presented in the handbook are reinforced by examples drawn from their work. The chapters cover system components found in today's HPEC systems by addressing design trade-offs, implementation options, and techniques of the trade, then solidifying the concepts with specific HPEC system examples. This approach provides a more valuable learning tool, Because readers learn about these subject areas through factual implementation cases drawn from the contributing authors' own experiences. Discussions include: Key subsystems and components Computational characteristics of high performance embedded algorithms and applications Front-end real-time processor technologies such as analog-to-digital conversion, application-specific integrated circuits, field programmable gate arrays, and intellectual property-based design Programmable HPEC systems technology, including interconnection fabrics, parallel and distributed processing, performance metrics and software architecture, and automatic code parallelization and optimization Examples of complex HPEC systems representative of actual prototype developments Application examples, including radar, communications, electro-optical, and sonar applications The handbook is organized around a canonical framework that helps readers navigate through the chapters, and it concludes with a discussion of future trends in HPEC systems. The material is covered at a level suitable for practicing engineers and HPEC computational practitioners and is easily adaptable to their own implementation requirements.

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